发明名称 Data processing system with independent peripheral sub-processors - has memory assigned to main processor and inbuilt memories in sub-processor modules
摘要 <p>A data processing system uses peripheral units controlled by separate sub-processor units. The system enables the main processor to operate at high data rates, while the sub-processor operate at much lower levels. The main processor (3) operates together with an associated memory (4) and communicates with sub-processor modules (7) with built-in memories. Data exchanges occur (5) with peripheral control units (6) complete with input/output keyboard and displays (11). The peripheral control modules are coupled to a printer (12) and tape reader (13). Typically the main data bus (8) can operate at Mbyte/sec rates, while the sub-processor buses (5) operate at approximately 30 kbyte/s.</p>
申请公布号 DE2942947(A1) 申请公布日期 1981.05.07
申请号 DE19792942947 申请日期 1979.10.24
申请人 STAUDE,WERNER 发明人 SIEBERTZ,PETER;STAUDE,WERNER
分类号 G06F13/12;G06F15/167;(IPC1-7):06F3/04;06F15/16 主分类号 G06F13/12
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