| 摘要 |
PURPOSE:To stabilize the characteristic and reduce the wiring resistance by using polycrystal Si as the first layer of the wirings, a metal silicide as the second layer thereof and Al as a most upper layer respectively in IC of MOS type including a multilayer wirings structure consisted of not less than three layers. CONSTITUTION:A P<-> type region 2 with deep depth and P<+> type regions with shallow depth 6 are respectively formed by diffusion on an N type Si substrate 1 and two N<+> type regions 7 are formed in the region 2 to form IC of Si gate MOS type. Then, thin gate SiO2 films 4 are coated between the regions 6 and 7 and thick field SiO2 films 3 are coated on the regions other than them. An opening is bored in each film 4 and an electrode wiring 5 of polycrystal Si is formed in contact with the regions 4, 6 and 7. Thereafter, an SiO2 film 8 is developed all over that by a CVD method and the stepped portion is made flat by the reflow of a PSG film 9. After boring windows on the film 9, an MO silicide wiring 10 is coated in contact with the wiring 5. In a similar manner, thus obtained surface is made flat by another PSG film 11 and then an Al wiring 12 is formed in contact with the wiring 10. |
