发明名称 JUNCTION FIELDDEFFECT TRANSISTOR
摘要 PURPOSE:To obtain an FET of low input capacitance by separating a semiconduc- tor layer into two island regions, providing a J-FET in one island region, and a diffusion region in the other island region, connecting it with the source region of the FET and extending a drain electrode onto the other island region. CONSTITUTION:On a P type semiconductor substrate 10, an N type layer 20 is epitaxially grown and the layer 20 is separated into two island regions by two P type substrate take-out regions 30 entering into the substrate 10: in one island region, a P type gate region 40, an N<+> type drain region 50 and a source region 60 are made, and thus a J-FET is formed: in the other island region, only an N<+> type region 60' is diffusion formed. Next, an insulating oxide film 90 is formed over the entire surface, windows, are opened, an electrode 80' formed on the region 60' is connected with a source electrode 80 coated on the region 60, a drain electrode 70 formed on the region 50 is extended onto the film 90 approaching the electrode 80', and here provided a pad 70'. By so doing, a low input capacitance J-FET can be obtained without lowering mutual conductance and inversed voltage.
申请公布号 JPS5648176(A) 申请公布日期 1981.05.01
申请号 JP19790123570 申请日期 1979.09.26
申请人 NIPPON ELECTRIC CO 发明人 KANAMORI SHIYUUJI
分类号 H01L29/80;H01L21/337;H01L29/808;(IPC1-7):01L29/80 主分类号 H01L29/80
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