| 发明名称 |
PROCESS FOR THE GENERATION OF WINDOWS HAVING STEPPED EDGES WITHIN MATERIAL LAYERS OF INSULATING MATERIAL OR OF MATERIAL FOR ELECTRODES FOR THE PRODUCTION OF AN INTEGRATED SEMICONDUCTOR CIRCUIT AND MIS FIELD-EFFECT TRANSISTOR WITH SHORT CHANNEL LENGTH PRODUCED BY THIS PROCESS |
| 摘要 |
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| 申请公布号 |
DE2860611(D1) |
申请公布日期 |
1981.04.30 |
| 申请号 |
DE19782860611 |
申请日期 |
1978.11.20 |
| 申请人 |
SIEMENS AKTIENGESELLSCHAFT BERLIN UND MUNCHEN |
发明人 |
TIHANYI, JENO;BELL, GUIDO |
| 分类号 |
H01L21/312;H01L29/10;H01L29/78;(IPC1-7):H01L21/31 |
主分类号 |
H01L21/312 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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