发明名称 PACKAGE FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enhance the reliability of the IC by forming a conductive pattern provided on a substrate of a porous metallized layer immersed with low resistance solder in a flat ceramic package and forming the connecting portion with an external lead terminal of double structure of dense and porous metallized layers. CONSTITUTION:When the IC chip 2 is secured into a die cavity 3 formed at a ceramic base 1 forming a flat type ceramic package, it is secured through a dense W metallized layer 13 in normal way. Then, the electrode of the chip 2 is connected to the conductive pattern 31 on the base 1 by using a fine wire 6. At this time the pattern 31 is formed of porous W metallized layer 31 immersed with low resistance silver solder. When connecting an external lead terminal 5 to the end of the pattern 31, a dense W metallized layer 31' is interposed therebetween. Thus, there can be obtained a package of good electric conductivity and adherence.
申请公布号 JPS5642362(A) 申请公布日期 1981.04.20
申请号 JP19790118259 申请日期 1979.09.14
申请人 FUJITSU LTD 发明人 HONDA NORIO;SUGIMOTO MASAHIRO;AKASAKI HIDEHIKO
分类号 H01L23/12;H01L23/057;H01L23/50 主分类号 H01L23/12
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