| 摘要 |
PURPOSE:To prevent the deterioration of reliability at the time of decoding, by deciding by means of the other CRC (Cyclic Redudancy Check), as well, and interpolating and correcting a data, when the bit information of rectangular arrangement to which 2 kinds of CRCs are provided is reproduced. CONSTITUTION:The error correction based upon the erasing information by CRC C1 and the interpolation by the data before and after the error are executed through the syndrome ratio calculating circuit 102, the coincidence circuit 91, etc. conforming with the reproduction information of rectangular arrangement, formed by bXK2 bits from each track which has been subjected to synchronizing control and CRCs C1, C2. On the other hand, coincidence or noncoincidence of contents of the circuit 120 is decided by CRC C2 through the circuit 102, the memory circuit 120 and the coincidence circuit 121, and in case when there is noncoincidence even once, a data interpolating command is generated from the supervisory circuit 123. Accordingly, even in case when no erasing information is received, by which an error has been overlooked, the interpolating correction is executed by detecting the error in advance, and therefore the deterioration of reliability in case of decoding can be prevented. |
