| 摘要 |
PURPOSE:To attain high-speed operation by increasing the precharge speed of a bit line and the solving speed of unbalance by making large the input signal level of a charge transfer type sense circuit by providing the sense circuit with a rewriting circuit. CONSTITUTION:When memory cell MC1 is selected and read, dummy cell DC2 is also selected at the same time. When clock phi1 is held at potential zero, MOSFETs T4 and T5 are ON and OFF in saturated regions. Next, word lines WL1 and DWL2 are held at the high potential and pieces of information in cells MC1 and DC2 are transferred to bit lines BL1 and BL2. Then when phi2 is held at the high potential to turn on T9, sense circuit SA is activated and when T12 and T13 are turned on by row selective signal CL1, signal line I/O is discharged to transfer ''1'' to the output circuit. Next, when phi3 is held at the high potential, line BL1 is charged up to VDD and in cell MC1, potential VDD is rewritten. |
