发明名称 CONTROL SIGNAL GENERATING METHOD
摘要 PURPOSE:To shorten the count time by reducing the number of counts, by generating a control signal by logically synthesizing the output of a counter circuit. CONSTITUTION:According to the advance of counting, counter circuit 3 generates fixed logic signals for outputs A, B, C, and D. The moment when the counting advances up to the 5th count, outputs A and C both show logic ''1'' and resetting circuit 4 is put into operation to reset oscillation control circuit 1 and circuit 3 with its output logic ''1''. As a result, the input to circuit 3 is stopped. To restart it, switch 9 is placed at the electric power source side. Then, outputs A-D of circuit 3 are applied to logical synthesizing circuit 5, which performs logic composition and inputs the output to one terminal of AND gate 23 of output circuit 6 while supplying the output of circuit 2 to the other input, so that a signal sectioned like 1, 0, 1, 0 will be outputted. For this purpose, switches 20-24 are selected to obtain different control signals, which are led out of transmitting circuit 7 made of infrared-ray diode 8.
申请公布号 JPS5639693(A) 申请公布日期 1981.04.15
申请号 JP19790114499 申请日期 1979.09.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 UENO HISAO
分类号 H04Q9/14;G08C23/04 主分类号 H04Q9/14
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