发明名称 Signal switch circuit for plural analog signals
摘要 A signal switch circuit which comprises a first emitter follower transistor supplied with an input signal of a first channel, and a second emitter follower transistor supplied an input signal of a second channel. The collectors of the first and second emitter follower transistors are connected to a positive power source through first and second switch circuits. The first and second switch circuits are established or interrupted in accordance with the D.C. level of a control potential. The first and second emitter follower transistors produce an output signal corresponding to any of the input signals, according as the first and second switch circuits are established or interrupted.
申请公布号 US4262218(A) 申请公布日期 1981.04.14
申请号 US19790011922 申请日期 1979.02.13
申请人 TOKYO SHIBAURA DENKI KABUSHIKI KAISHA 发明人 ISHII, JUN
分类号 H03F3/181;H03F3/72;H03K17/60;H03K17/62;(IPC1-7):H03K17/00 主分类号 H03F3/181
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