发明名称 ERROR DETECTION SYSTEM
摘要 PURPOSE:To diagnose a fault by providing an analog error detecting circuit that checks an analog value with regard to respective nodes at the package or function- unit boundary of a logic unit and then by selectively connecting respective nodes to the analog error detecting circuit in sequence. CONSTITUTION:When a logic error detection signal is transmitted from logic circuit 4' to error detection control part 10, control part 10 selects a node at a relating part so as to discriminate a fault point in details by the contents of the logic error and then operates an analog error detecting circuit suitable to it. Now, while the part where the logic error is generated is assumed to be in logic circuit part 4', node selecting circuit 5 selects input-output signal lines l17-l22 of logic circuit part 4' as logic nodes and node selecting circuit 5' selects electric power source nodes l24 and l25 to perform analog error detection, so that whether the logic error is caused by the electric power source system or logic node system will be judged.
申请公布号 JPS5636751(A) 申请公布日期 1981.04.10
申请号 JP19790111147 申请日期 1979.08.31
申请人 FUJITSU LTD 发明人 OGAWA YOSHIYUKI
分类号 G06F11/22 主分类号 G06F11/22
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