发明名称 Interlock control circuit for tape recorders - has interlock control logic to provide operational mode control
摘要 <p>The interlock circuit is arranged so that signals are generated relating to the record mode (X) and the start or pause operator (7). The record signal is processed by an inverter (N100) to provide an input to an AND-gate (U1). The AND-gate output passes through a timing stage (ti) and is combined in an AND-gate (U2) with the generated input (Y) relating to pause commands (P) and start signals (LV,LR). The timer operation ensures that commands may only be transmitted within a specific interval. A multivibrator (F) is actuated only when a wind command (WV,WR) is not present.</p>
申请公布号 DE2934064(A1) 申请公布日期 1981.04.09
申请号 DE19792934064 申请日期 1979.08.23
申请人 PAPST-MOTOREN KG 发明人 CAP,HEINRICH
分类号 G11B15/04;H03K19/21;(IPC1-7):11B15/04;11B15/44;05B23/02;03K19/21 主分类号 G11B15/04
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