发明名称 Clock recovery network.
摘要 <p>A clock recovery network comprises a synchronised voltage controlled oscillator 10 which receives the input data stream and provides at its output a clock signal synchronised with the input data stream. The tuned centre frequency of the oscillator is controlled by a coarse tuning signal in the form of a voltage proportional to the incoming symbol rate, supplied through an integrator 14 by a frequency-to-voltage converter 12 receiving the input data stream as its input. The coarse tuning signal determines the appropriate frequency range at which the oscillator 10 should operate and the oscillator is then positively synchronised to the frequency f, of the incoming data stream.</p>
申请公布号 EP0026639(A2) 申请公布日期 1981.04.08
申请号 EP19800303369 申请日期 1980.09.25
申请人 COMMUNICATIONS SATELLITE CORPORATION 发明人 UZUNOGLU, VASIL
分类号 H03L7/24;H04L7/00;H04L7/027;(IPC1-7):04L7/02;04L27/00 主分类号 H03L7/24
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