| 摘要 |
<p>PURPOSE:To ensure a high-speed execution of the interruption through the microprocessor, by resetting the microprocessor in case the interruption signal requiring an emergent process is produced. CONSTITUTION:The interruption signal INT is supplied to the differentiating circuit 6 via the OR circuit 5; and at the same time the circuit 6 supplies the reset signal R1 to the OR gate 7. Then the gate 7 supplies the reset signal R' to the reset input RIN' of the micro CPU1. Thus the CPU1 is reset to be put under the initial state. Here the CPU1 confirms that its resetting is due to the reset signal R1, accepts the interruption request IREQ and delivers the interruption reply signal JACK through the interruption acceptance terminals INTA to then supply it to the circuit 3. Then the data having the contents of the factor of interruption is sent to the bus 2 by the input of the reply JACK to be given to the circuit 3. And the CPU1 reads the data. In this way, the process of interruption can be executed in a high speed by the microprocessor.</p> |
