| 摘要 |
PURPOSE:To secure the holding of the data with the low power consumption and with no increment of the number of terminals, by having such a sonstitution in that the power supply is stopped to both the CPU and the memory part by opening the switch when the CPU completes the program process. CONSTITUTION:When the CPU10 starts the operation, the operation start signal is supplied to the FF8 through the external terminal 6. And then the FET9 is closed to supply the power to both the CPU10 and the ROM11. When the CPU10 completes its operation, the reset signal 13 is generated within the CPU10 for the FF8. And the FET9 is cut off by the reset of the FF8 to stop the power supply to the CPU10 and the ROM11. On the other hand, the power supply is still continued to the RAM12 at this moment, and thus the data can be held even with the voltage of a low level. In case the interruption control signal 6 is supplied from outside at this moment, the FF8 is set to start again the power supply to the CPU10 and the ROM11. Thus the CPU10 is actuated. In such way, the data of the RAM12 can be held even with the voltage of a low level and without providing two units of the power supply terminal which are so far required. |
