发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce the gate resistance and the noise of a semiconductor integrated circuit by implanting ion through an insulating film to form a channel by self-alignment to increase the transfer conductance thereof and increasing the size of a gate on the surface in short channel length state. CONSTITUTION:An N type epitaxial layer 102 is isolated with a P type layer 103 on a P type substrate 101 to form P type well 106, connecting layer 108a and base layer 108b thereon. Ions are implanted through the nitride film 104 to form low density N type layer 109 by the layers 108a, 108b. Then, the portion 109' between the film 104 and the layer 106 may become substantially short channel. The nitride film 104a on the portion 109' is retained, and N type layers 112a-112d are selectively formed by the oxide film mask. Subsequently, the nitride film 104a is removed by the oxide film mask 113 to form a shallow P<+> type surface gate layer 114. Finally, an oxide film 113' is coated thereon, and an electrode is attached thereto. Since in this configuration, short channel is formed to increase the transfer conductance and the surface gate is formed widely with low resistance and with low source resistance, its thermal noise is made extremely low.
申请公布号 JPS5629361(A) 申请公布日期 1981.03.24
申请号 JP19790105311 申请日期 1979.08.17
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SADAMATSU HIDEAKI
分类号 H01L29/80;H01L21/31;H01L21/337;H01L21/8222;H01L21/8248;H01L27/06;H01L29/808 主分类号 H01L29/80
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