发明名称 KRETS FOR TIDGIVNING VID MOTTAGARSTATIONEN I EN PA JORDEN BELEGEN ANPASSNINGSMODUL AV TAL-DIGITALISERINGS-INTERPOLERANDE TYP, SERSKILT FOR ETT KOMMUNIKATIONSSYSTEM VIA TDMA-SATELLIT
摘要 A circuit arrangement is provided for timing the receiving section of a terrestrial interface module of the voice digital interpolation type, in a time- division transmission system via satellite comprising a plurality of stations. Counting of the standard channel number and of the overload channel number emitted by each station is carried out by means of a single counting chain CN with which is associated a memory MM capable of storing the channels which have been emitted by each station. If in the same frame a given station emits further blocks of channels, the number of channels previously stored in the memory MM is pre-loaded into the counting chain, and the counting continues from this number. <IMAGE>
申请公布号 SE8006555(L) 申请公布日期 1981.03.20
申请号 SE19800006555 申请日期 1980.09.18
申请人 SITS SOC IT TELECOM SIEMENS 发明人 PENNONI G
分类号 H04J3/00;H04B7/155;H04B7/212;H04J3/06;H04L5/24;(IPC1-7):H04B7/17 主分类号 H04J3/00
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