| 摘要 |
PURPOSE:To miniaturize the configuration and to reduce the power consumption by providing a doping region at the location adjacent to the portion directly under the gate electrode of a semiconductor substrate of an MIStype capacitor, connecting the gate electrode to a word line, and connecting the doping regions to a bit line. CONSTITUTION:The extension of a gate electrde 1 is transformed into a word line W, and an N<+>region 2 which is a high-concentration doping region is connected to a bit line B via a contact 5. While, an MIS capacitor is constituted by a Ptype Si substrate 3, a gate insulating film 4, and a gate electrode 1. The P type Si substrate 3 directly under the gate insulating film 4 constitutes one electrode of the MIS capacitor, and the N<+>doping region 2 is provided at the portion adjacent to the electrode. Furthermore, the N<+>doping region 2 is connected to the bit line B via a contact 5. The insulation between those wirings are effected by SiO2 films 6 and 7. |
