| 摘要 |
The analog video signal for a modular flat panel display device is digitized in an analog to digital converter. The digitized data are supplied to a left/right serial shift register. A left/right control signal causes the left/right shift register to periodically receive data on either a left input terminal during a left loading mode or a right input terminal during a right loading mode. In each loading mode a portion of the data are output from the serial register over a right output terminal and the other portion over a left output terminal. Accordingly, during each loading mode one portion of the data is output in the same order as received and the other portion in an order reversed from the received order. The data from the left/right register are supplied to primary registers and because of the operation of the left/right register data for adjacent primary registers are in opposite order.
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