发明名称 FRAME SYNCHRONIZING SYSTEM
摘要 <p>PURPOSE:To make close the frame synchronizing pulse, by transmitting the frame synchronizing auxiliary pattern pulse signal in 7 bits when the specific channel is at noncommunication state, to constitute the synchronizing information of one-frame 8 bits. CONSTITUTION:When the channel CH5 is at noncommunication state, ground signal is fed to the transmission signal line 2. The ground signal is delivered to the auxiliary frame pulse generator 10 from the transmission end corresponding to the channel CH5, and thus, the auxiliary frame pulse generator 10 produces the specified pattern signal in 7 bits. At the reception side, besides the frame synchronizing bit, the pattern state of the frame synchronizing auxiliary pattern pulse signal is detected with the frame synchronizing circuit 17. If the frame synchronizing circuit 17 detects the error in the frame synchronizing pattern and regards it as the out of synchronizm, the synchronism is again taken.</p>
申请公布号 JPS5625848(A) 申请公布日期 1981.03.12
申请号 JP19790102394 申请日期 1979.08.10
申请人 FUJITSU LTD 发明人 FUJIMOTO NAONOBU;FUKUSHIMA TAKEO
分类号 H04J3/06;H04L7/00;H04L7/08 主分类号 H04J3/06
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