| 摘要 |
On the receiver side of a burst communications system, such as a time-division multiple access (TDMA) system, the clocks of every burst have to be recovered and synchronized. The clock recovery circuit (104) of the present invention comprises an oscillator (3) with a frequency substantially equal to the clock frequencies, a phase difference detection circuit (2), an averaging circuit (4) for averaging the phase differences detected, a memory circuit (6) for storing the averaged phase difference, a control circuit (5), and a phase shift circuit (7) generating a recovered clock S based on the output from the oscillator (3) and the phase difference read out from the memory circuit (6). The recovered clock of a burst issued by a station is used as the clock for a subsequently incoming burst of the same station. Thus the response time required in conventional clock recovery devices is avoided and the S/N ratio of the recovered clocks is improved. |
