| 摘要 |
PURPOSE:To enhance the protective effect of an integrated circuit by inserting two FETs connected with drain and source in series between the input and/or output terminal of an FET circuit to be protected and a power supply line. CONSTITUTION:FET Q1, Q2 are of enhancement type. When abnormal positive voltage is now applied to external terminals 7, 8 to exceed the voltage of a power supply line 4 and further exceed the sum of the threshold voltage, the FETs Q1, Q2 are turned ON to prevent application of abnormal voltage to the input and output terminals 1, 2 of the circuit 1 to be protected. In this case the potential of the source S1 of the transistor Q1 becomes intermediate value between the external terminal and the power supply line, and the voltage between the drain and the source of the transistor Q1 becomes approx. a half of that in case of only the transistor Q1 so as to largely improve the withstand voltage of the protective circuit itself. Further, when the channel length of the transistor Q2 is set to minimum value capable of manufacturing it, the resistance at the time of conducting is lowered, and the channel length of the transistor Q1 is set longer than it, then, the protective circuit is difficult to be broken down, thereby increasing the protective effect of the integrated circuit. |
