| 摘要 |
<p>There is herein disclosed an inverter of an integrated logic structure which is formed in a semiconductor device. More particularly, an epitaxial layer is formed on a semiconductor substrate. This layer includes a laterally arranged transistor and a vertically arranged transistor in side by side relationship. The collector of the lateral transistor is connected integrally with the base of the vertical transistor. The base of the lateral transistor is connected integrally with the emitter of the vertical transistor. Supply voltage terminals are provided, one of which is connected to the emitter of the lateral transistor and the other of which is connected to the base of the lateral transistor as well as to the emitter of the vertical transistor. Diodes corresponding in number to the number of collectors in the vertical transistor are connected respectively in parallel with each basecollector junction of the vertical transistor and poled the same as the basecollector junctions. The emitter of the vertical transistor is formed as a buried layer in the semiconductor device. The lead from the outer surface to this buried layer is a highly doped zone, preferably formed by ion implantation. Each inverter is separated from an adjacent inverter in the same semiconductor chip by suitable isolation means, such, for example, by an insulating guard ring of SiO2 or by pn junction isolation. The output is taken from the collectors of the vertical transistor.</p> |
