发明名称 DELAY EQUALIZING CIRCUIT NETWORK
摘要 PURPOSE:To enable hybrid circuit integration for the delay equalizing circuit network at low frequency region, by combining the CR active filter and adder. CONSTITUTION:The transfer function (1) of the delay equalizing circuit network can be modified into generic amplification factor mu and the feedback rate beta, based on the feedback amplifier theory. Taking into consideration the transfer function (1) based on the odd function parts U(P) and G(P) of Hurwitz's polynomial, then mu=U(p)/G(p) can further be expanded to partial fraction by taking beta=1. Accordingly, the CR active filter having the transfer function corresponding to the terms of each partial fraction is cnnected in parallel and desired transfer function can be realized by the feedback of -1.
申请公布号 JPS5623041(A) 申请公布日期 1981.03.04
申请号 JP19790098606 申请日期 1979.08.03
申请人 NIPPON ELECTRIC CO 发明人 SUZUKI HIROSHI
分类号 H03H7/01;H04B3/14 主分类号 H03H7/01
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