发明名称 Silicon barrier Josephson junction configuration
摘要 A planar, silicon barrier, Josephson junction and method of forming the junction which does not require expensive high-resolution, lithography techniques such as electron beam or x-ray. The method includes an etching mask-etch process which forms the basic structure configuration using a (110)-cut silicon wafer. Subsequent to the etching process the mask is removed and a superconducting film is deposited on the previously formed silicon surface to produce a single crystal silicon barrier with good electrical properties.
申请公布号 US4253230(A) 申请公布日期 1981.03.03
申请号 US19790010859 申请日期 1979.02.09
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY 发明人 DAVIS, KENNETH L.
分类号 H01L39/22;(IPC1-7):B01J17/00 主分类号 H01L39/22
代理机构 代理人
主权项
地址