发明名称 VIRTUAL FAILURE GENERATING SYSTEM
摘要 PURPOSE:To enable to produce virtual failure simply at the location desired in the tested unit, by holding the instruction externally in the virtual failure generation and control circuit and producing the virtual failure from this instruction. CONSTITUTION:The information which types of virtual failure is produced at which timing through the reception of instruction from the service processor, taking an intermittent failure or permanent failure is stored in the virtual failure generation and control circuit 10 to control the next stage. Further, based on the control signal from the virtual failure generation and control circuit 10, the virtual failure activation circuit 12 produces the virtual failure generation signal in synchronizing with the timing signal of the virtual failure generation timing circuit 11. The virtual failure generation circuit 13 produces virtual failure with the virtual failure generation signal. Further, when the production of the virtual failure is detected by the failure detection circuit 14, error reception signal is fed to the virtual failure activating circuit 12 via the failure processing circuit 15 to control the relinquishment or production of virtual failure generating signal.
申请公布号 JPS5621253(A) 申请公布日期 1981.02.27
申请号 JP19790096603 申请日期 1979.07.28
申请人 FUJITSU LTD 发明人 IWATA KATSUYUKI;NAGATA SATORU
分类号 G06F11/22 主分类号 G06F11/22
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