发明名称 RECEIVING MARGIN CONFIRMING SYSTEM
摘要 PURPOSE:To receive transmission data by the receiving part to make it possible to confirm the receiving margin efficiently, by providing a margin clock, which has the phase changed by the receiving margin, in the transmission part in the communication control unit which transmits and receives data in the start-stop synchronizing system. CONSTITUTION:In bit transmission circuit 6, data 12 output from character decomposing part 8 is input to FF 12, and FF 11 is operated by reference clock 15 from switching circuit 14 or the clock from margin clock 13, and the output is transmitted to connection line l1, and sampling circuit part 5 performs sampling at the timing of clock 17 through connection line l1 folded to the receiving part, and receiving data is received by FF 11 and is transmitted to character assembling part 7. For the margin test of -45%, a distortion signal is transmitted by the margin clock which has the phase advanced by 45% for the reference clock and is sampled by the selection clock in the receiving side and is received correctly only with a margin of rest 5% for this selection clock, so that the margin of -45% can be confirmed.
申请公布号 JPS5621453(A) 申请公布日期 1981.02.27
申请号 JP19790097678 申请日期 1979.07.31
申请人 FUJITSU LTD 发明人 KOBAYASHI NOBUHIRO
分类号 H04L25/02;H04L1/24;H04L29/14 主分类号 H04L25/02
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