| 摘要 |
PURPOSE:To perform restoration at one cycle and to decrease the processing time, by providing the +8 circuit to the register storing the 1st operand address of transfer instruction. CONSTITUTION:If the value of transfer instruction is >=24, the flip flop 108, is set and the instruction decoder 104 performs high speed transfer processing. When the 1st operand address B1+D1 is set to the write-in address register 123 and the content is transferred to the SC unit through the line 202, it is stored, 8 is added from the adder 124 at the same time and stored to the register 125 for the calculation of the next write-in address. |
