| 摘要 |
PURPOSE:To detect the malfunction of the program and then secure the normal program operation, by using the vertical synchronizing signal of the video signal for the clock and then providing the counter which resets the output of the CPU. CONSTITUTION:Video signal SO is supplied to synchronous isolating circuit 1, and vertical synchronizing signal S3 is isolated to be supplied counter circuit 8 in the form of the clock signal. At the same time, CPU2 utilizes signal S3 as the interruption signal and then secure the synchronism with signal SO to then deliver reset signal 5 to circuit 8 with detection of the interruption signal. In case the noise is applied to data bus DT and address bus AD to cause the malfunction to the program, CPU2 delivers no signal S5 but circuit 8 starts counting. And when the counting of circuit 8 reaches the fixed value, pulse signal S7 of one level is delivered to mixing circuit 10 from pulse generating circuit 9. Circuit 10 delivers reset signal S8 of the CPU to CPU2, and CPU2 reads in the program again to secure an immediate resetting to the normal program operation. |
