发明名称 MANUFACTURE OF MOS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To stabilize the threshold voltage of an MOS semiconductor device by covering the surface of a channel region with an oxide film and a nitride film when diffusing an n<+>-type source and drain to eliminate external diffusion of phosphorus impurity at the time of oxidizing gate. CONSTITUTION:A surface oxide film 2 is formed on a p<->-type Si substrate 1, and with a nitride film 13 formed thereon as a mask an n<->-type well 3 is formed in the drain region. Then, n<+>-type layers 14, 15 becoming source and drain are formed to form n<+>-type source 8 and n<+>-type drain 9 by thermal diffusion, and oxide films 16, 17 are formed. Then, the film 13 is removed, thin portion 2 of the oxide film is once removed, and a gate oxide film 18 is newly formed thereafter. Subsequently, a polysilicon gate 19 is formed, and with the gate 19 as a mask an n<+>-type layer 20 is formed. Then, a PSG film 21 is formed on the entire surface, contact photoetching is executed in the source and the drain regions, and aluminum wires 22 are then formed.
申请公布号 JPS5618468(A) 申请公布日期 1981.02.21
申请号 JP19790093776 申请日期 1979.07.25
申请人 HITACHI LTD 发明人 ASHIKAWA KAZUTOSHI
分类号 H01L29/417;H01L29/78 主分类号 H01L29/417
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