SCHALTUNGSANORDNUNG ZUR ERKENNUNG EINES EMPFANGENEN VORGEGEBENEN PRUEFSIGNALS FUER EIN DATENMODEM, INSBESONDERE FUER EIN BILDSCHIRMTEXT-MODEM

摘要

A circuit arrangement for identifying a test signal in a videotex modem has a pulse former stage (IF) with a sub-stage (ZIO) connected downstream whose output signal serves to synchronise a circuit (92, FF1, FF2) in order to generate a comparison pulse string (V) which is applied to the D-input of an RS flip-flop (FF3) to whose clock input the test signal is applied. A counter (Z14) counts the test signal pulses but is reset by the output signal of the flip-flop (FF3) if a pulse does not occur within the time slot defined by the width of the pulses of the comparison pulse string. When the counter (Z14) reaches its final position, i.e. when the test signal has been correctly identified, the output signal of the latter triggers a second RS flip-flop (FF4) at whose output a signal (M) for successful testing appears. <IMAGE>