| 摘要 |
<p>A proportional-integral circuit comprising a proportional element, an integrator and an adder. In an automatic mode, the proportional element delivers an output signal VP which is proportional to an input signal Vi, the integrator delivers an output signal VI by integrating the input signal Vi, and the adder delivers an output signal VPI which is the sum of the output VP of the proportional element and the output VI of the integrator. In a handling mode, the input signal Vi is not applied to the integrator, and the output VP of the proportional element and an output VH of a manual handling source are applied to the integrator. A resistor is connected in parallel with a feedback capacitor in the integrator so that the integrator possesses an adding function. The adder adds up the output VP of the proportional element and the output VI of the integrator. Further, in this circuit, the gain of the integrator output VI relative to VP and VH is selected to be l/n, and the gain of the adder output VPI relative to VI is selected to be n.</p> |
