发明名称 REFRESHING CIRCUIT FOR DYNAMIC RAM
摘要 PURPOSE:To back up a memory for a long period with small batteries in case of an electric power failure by improving the efficiency of utilization of the memory by allowing a refresh frequency to vary with ambient temperature. CONSTITUTION:With regard to the oscillator consisting of NAND circuit 1, capacitor 3, resistance 4, and thermistor 8, its output is a rectangular wave whose period is determined by 0.7RTC, providing that RT is the resistance value of thermistor 8 and C is the capacity of the capacitor. Its oscillation frequency is high at a high temperature and low at a low temperature. This rectangular wave is processed by memory clock generating circuit 5 to obtain a clock for refreshment is also converted into an address signal for refreshment by memory address generating circuit 6. With those clock and signal, the memory contents of dynamic RAM7 are refreshed. In this case, the frequency varies with ambient temperature and the memory operates with high efficiency of utilization. Here, when an element having electric power current, in refreshment, in proportion to the frequency is used as RAM7, miniature battery for backup current for a electric power failure can be used.
申请公布号 JPS5613588(A) 申请公布日期 1981.02.09
申请号 JP19790087762 申请日期 1979.07.11
申请人 MITSUBISHI ELECTRIC CORP 发明人 KAMEOKA SHINOBU;IIDA HIDEMASA
分类号 G11C11/406;G11C11/4094 主分类号 G11C11/406
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