| 摘要 |
<p>PURPOSE:To make it possible to correct a program in ROM with efficiency by making it possible to correct the program in ROM in RAM perfectly while areas in ROM are made to correspond to those in RAM. CONSTITUTION:ROM1 to be corrected and RAM2 assignable with the same addresses with ROM1 supply data to selector 3 simultaneously from memory places addressed by an address signal in accordance with a memory access timing signal. Oh the other hand, clock generator 4 generates a clock higher in frequency than the timing signal. Receiving this clock, scanning controller 5 scans address register 6. Register 6 outputs the address signal, set in itself, successively. Comparator 7 compares the address signal from register 6 to external one and, when the both agree with each other, outputs an identity signal. In accordance with this identity signal, selector 3 selects and outputs either of data, supplied from ROM1 and RAM2 simultaneously, to a data output bus.</p> |
