| 摘要 |
PURPOSE:To enable the high speed write-in and prevention of mis-readout, by providing the memory cell formed with FET and a capacitor at the specified cross point for two sets of bit lines and two sets of word lines, and by differential amplification of signal between two sets of bit lines. CONSTITUTION:The memory cells consisting of static capacitors 1161, 1162 and MISFET1151, 1152 are respectively provided at the cross points of the line 104 and line 1171 and of the lines 105 and 1172 among two sets of parallel bit lines 104, 105 to which the differential type sense amplifier 101 is connected, and among two sets of word lines 1171, 1172, and the capacitor 1161 is selected via the word line 1171. Then, when the input amplifier 113 is connected by turning on MISFET106, 107 on the lines 104, 105, the lines 104, 105 are respectively at high and low potential, and the potential on the line 104 is increased with the amplifier 101 and the write- in to the capacitor 1161 can be ensured in high speed. This is the same to readout, and when the ground terminal 121 of the amplifier 101 is kept at low potential, the readout data is amplified, and it is further amplified at the amplifier 114 to prevent the production of mis-readout. |
