| 摘要 |
PURPOSE:To obtain the linearity of conversion, by obtaining a lower-order bit, through the input of reference voltages of an odd number order to a terminal of a voltage divider, reference voltages of an even number order to another terminal of the voltage divider and the voltage division of the potential difference, and the comparison of an analog input voltage with the other reference voltages to be produced. CONSTITUTION:An analog input signal Vin is sample-held 11 and inputted to comparators 12a, 12b and 12c. In the comparators, a comparison voltage Vref of a specified level with a reference voltage generator 13 outputs reference voltages V11, V10, V01, V00 via resistors 13a-13d. An upper-order 2-bit of the output of the comparators 12a-12d is encoded 15 via parallel exclusive OR circuits 14a-14d. Switching circuits 16a-16d selectively pick up reference voltages of an odd and an even number order nearest the analog input voltage and give the voltages to a voltage divider. The output of the voltage divider 17 is given to comparators 18a-18d and a lower-order 2-bit is outputted from an encoder 20. |
