发明名称 INSULATING GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To obtain a double channel dope and short channel MOSFET for high speed and high density IC by using a semiconductor substrate with the impurity concentration of predetermined range wherein the amount of dope of deep channel and the length of channel are established as predetermined. CONSTITUTION:Punch-through will effectively be checked if a shallow channel part is made high concentration for an MOSFET having P-type channel dope layers 26, 27 of two layers, which are deep and shallow respectively. On the other hand, a threshold voltage is determined by the concentration of a P-type substrate 21 and the dope amount of all channels. If the concentration of the substrate is set at about 3X10<14>cm<-3>-1X10<15>cm<-3>, the substrate voltage dependence on the threshold voltage becomes small. If a deep channel dope layer 26 with predetermined concentration is provided around a depth of 0.4mum from the surfaces of a gate insulating film 24 and the substrate, punch-through at the substrate under the layer 26 will be prevented. The dose amount of the shallow layer 27 is automatically determined from the dose amount of the layer 26 as the total amount of the channel dope is decided by determining the threshold voltage and the concentration of the substrate. Thus, a high speed MOSFET will be obtained by this structure.
申请公布号 JPS568879(A) 申请公布日期 1981.01.29
申请号 JP19790084259 申请日期 1979.07.03
申请人 NIPPON ELECTRIC CO 发明人 TERADA KAZUO
分类号 H01L29/78;H01L29/10 主分类号 H01L29/78
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