发明名称 |
Binary to pseudo-ternary code converting circuit - has load input of shift register connected to coincidence gate outputs and to multi-switch via delay element |
摘要 |
<p>Telecommunications circuitry is esp. for telephone exchanges in which sequential binary signals are transmitted in pseudo-ternary form form. The binary signals are fed to a shift register for intermeW intermediate storage. The signals are pulse controlled as they pass through the register and are supplied to a multi switch for conversion to pseudo-ternary signals. The multi switch re-delivers the logic one binary signals with alternating polarity and the logic null unchanged. The outputs of the shift register are separately coupled to the inputs of a coincidence gate. The latter monitors the binary signals entered into the shift register for re-delivering as a continuous series of n+1 binary signals of the opposite type-one or null, except for the last series. A binary signal of the same type-one or null- is formed instead and stored in the corresponding position in the register.</p> |
申请公布号 |
DE2928065(A1) |
申请公布日期 |
1981.01.29 |
申请号 |
DE19792928065 |
申请日期 |
1979.07.11 |
申请人 |
SIEMENS AG |
发明人 |
ABRAHAM,DIPL.-ING. TROOST,MARCEL |
分类号 |
H04L25/49;(IPC1-7):03K13/00 |
主分类号 |
H04L25/49 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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