发明名称 |
Electrically alterable nonvolatile memory |
摘要 |
An electrically erasable nonvolatile memory system comprises nonvolatile memory cells each including one transistor. A plurality of row lines are connected commonly to the control gates of the memory cells arranged in a row direction, respectively. For applying a positive voltage to a selected row line upon data-write or data-read and a negative voltage to a selected row line upon data-erase, a plurality of control circuits are provided. Each control circuit is coupled with a corresponding one of the row lines, with one of outputs of a row decoder selecting a row line and with a control terminal which is commonly coupled to the control circuits. Each control circuit is so constructed as to supply to a corresponding row line with a voltage having a prescribed level corresponding to a voltage level applied to the control terminal.
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申请公布号 |
US4247918(A) |
申请公布日期 |
1981.01.27 |
申请号 |
US19790072938 |
申请日期 |
1979.09.06 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
IWAHASHI, HIROSHI;ARIIZUMI, SHOJI |
分类号 |
G11C17/00;G11C11/34;G11C16/04;G11C16/06;G11C16/08;G11C16/10;G11C16/16;H01L27/115;H01L29/792;H03K3/356;(IPC1-7):G11C11/40 |
主分类号 |
G11C17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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