| 摘要 |
PURPOSE:To reduce the number of times of multiplication and to decrease the scale of the hardware, by sequentially connecting the spectrum inversion circuit, offset discrete Fourier processing circuit and polyphase circuit. CONSTITUTION:The base band signals of N sets are in time-sharing and multiplex at the input terminal 10 and are input every sampling frequency fs. Accordingly, one frame is 1/fs seconds. In the spectrum inversion circuit 20, the multiplication of (-1) is made to an odd or even number frame to the signals of N/2 sets predetermined. In the offset discrete Fourier processing circuit 30, the operation expressed in equation (14) is made. Where; XK(Z<n>) in equation (14) is the output of the circuit 20. Accordingly, in the output of the circuit 30, N sets of data of A0R(Z<n>), A1R(Z<n>),...An-1R(Z<n>) are in time sharing multiplex in one frame. This output is obtained at the terminal 50 via the polyphase circuit 40 as single-sideband frequency division multiplex signal. |
