| 摘要 |
PURPOSE:To secure the normal continuation of the interruption process without causing any system breakdown, by setting forcedly all bits to ''on'' in case the parity error is detected in the read contents of the interruption request register memory. CONSTITUTION:Interruption request register memory 300 in the transfer device is always scanned, and the interruption action is given to the CPU by referring the information of the memory region corresponding to channel control unit 200 when the bit reads out the contents of ''1''. In case the parity error is detected in the read contents of memory 300 at the request register time or the scanning time to memory 300, control circuit 320 gives the indication to write ''all 1'' to partial writing circuit 330 through bus 408. Then ''all 1'' is written to the address shown by address register 340, i.e., the address that has just been read out. Accordingly, the interruption request can always be found out by scanning action to perform the interruption action at all times. Thus the alteration has been given so as to secure the normal operation for the device as a whole. And accordingly, the worst fault such as the system breakdown or the like can be avoided. |
