发明名称 LEVEL CONVERTING CIRCUIT
摘要 PURPOSE:To prevent the undesired level output by setting the output level of the level converting circuit forcedly to the level of one side when the power voltage becomes to the prescribed level or less. CONSTITUTION:When negative power voltage VEE becomes to a small voltage level in terms of the absolute value, no sufficient bias current is supplied to transistor Q10 at bias part 3. And thus the emitter current of Q10 is reduced, and accordingly the collector current is reduced for the collector of constant current transistor Q15 at level converting part 1. And the low-level potential of node N1 increases. Thus transistors Q18 and Q19 start conduction in case transistor Q13 is turned on by the emitter-coupled logic signal of input A. Then the level of output terminal P2 is turned forcedly to a low level.
申请公布号 JPS566534(A) 申请公布日期 1981.01.23
申请号 JP19790081351 申请日期 1979.06.29
申请人 HITACHI LTD;HITACHI OME ELECTRONIC CO 发明人 MASUDA KOUJI;MIZUKAMI MASAO;KITAMURA NOBUAKI
分类号 H03K5/02;H03K19/018 主分类号 H03K5/02
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