发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To obtain an I<2>L circuit having a high switching speed, by preventing the saturation of the input transistor TR at the I<2>L circuit. CONSTITUTION:When the potential level of base input terminal 2 is at logic ''1'', the current supplied from injector terminal 1 is supplied to the base of input TRQ2 through injection TRQ1. Thus TRQ1 is turned on. At this moment, TRQ3 is connected in parallel to the base-emitter junction of TRQ2 in order to prevent the saturation of TRQ2. As a result, part of the current flowing to the base of TRQ2 from terminal 1 is made to pass through TRQ3 to secure the by pass. Thus the saturation of TRQ2 can be prevented. Accordingly, the switching time can be shortened for the I<2>L circuit.
申请公布号 JPS566538(A) 申请公布日期 1981.01.23
申请号 JP19790081362 申请日期 1979.06.29
申请人 HITACHI LTD 发明人 HATSUTA YASUSHI;ENOMOTO MINORU
分类号 H03K19/091 主分类号 H03K19/091
代理机构 代理人
主权项
地址