Forbidden code detector for process control - uses logic system to control transistor chain to break power supply connection

摘要

The forbidden code detector for a process control system uses a bipolar driver circuit with a PNP transistor (22) connected to the positive terminal (18) of the power supply and a second NPN transistor (28) connected to the negative terminal (20). Each is driven by a further NPN transistor (24,30). At one input (A) is a high level signal which is passed to logic monitoring system with a NAND gate (36) and a NOR gate (38). The first gate gives a high output when the input load is low, and the second gate, gives a high output when the input level when a warning signal is received, i.e. when an invalid signal is applied to the input. This applies a control signal to an input transistor (40) with its collector connected to the base of a further transistor, earthing it so that its emitter-collector circuit is non conductive and the next transistor (32) is cut off. This controls the other two transistors (24,30) so that the two output transistors (22,28) are cut off.