发明名称 EXTERNAL TIMER SIMULATING SYSTEM
摘要 PURPOSE:To prevent an electronic exchange system from being mis-judged to be faulty by stopping pseudo time information generated by a pseudo call generating system while a central processing unit of the electronic exchange system stops its operation. CONSTITUTION:When a clock generator 14 sends a clock signal ck of a prescribed period to a central processing unit 22 via a clock reception section 23, the unit 22 executes a clock interruption processing and allows a time generation control section 223 to check a logical value of an operation stop control signal (s) sent to a central processing unit 13 by an operation stop control section 222. As the result of check, when the signal (s) is set to logical '0', the control section 223 discriminates that the unit 13 is in operation and makes a time information generating section 221 execute the generation processing of pseudo time information tc. On the other hand, as the result of check, when the signal (s) is set to logical '1', the control section 223 discriminates that the unit 13 is in the stop state and stops making the generation section 221 apply the generating processing of the pseudo time information tc.
申请公布号 JPS62144452(A) 申请公布日期 1987.06.27
申请号 JP19850286225 申请日期 1985.12.19
申请人 FUJITSU LTD 发明人 OSAWA JIRO;KATO KENJI
分类号 H04M3/26;H04M15/00 主分类号 H04M3/26
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