Delayed AGC circuit

摘要

A delayed AGC circuit in which an AGC detection output is divided into two portions, one of them is applied through buffer means to an IF amplification stage to thereby control the gain thereof, and the other portion is applied to a tuner through a threshold circuit to thereby control the gain thereof. A variable resistor or potentiometer for AGC delay adjustment and a high-frequency bypass device are connected at a point in the AGC signal path from the output of the buffer means to the IF amplification stage.