| 摘要 |
A leaky digital integrator comprising an accumulator circuit including an adder having first and second adder input terminals and an adder output terminal, and a shift register coupling the adder output terminal back to the second adder input terminal and to an integrator output terminal; a ternary signal detection circuit coupled to the integrator output terminal and operative to develop one of three decay factor signals depending upon whether the integrator output signal level is above, equal to or below a predetermined reference level; and switching apparatus having a first switched terminal which is periodically coupled at a first rate to the first adder input terminal to input update data signals to the accumulator circuit and a second switched terminal which is periodically coupled at a second rate to the first adder input terminal to input decay data signals to the accumulator circuit such that the circuit as a whole performs according to the equation ai(t)=Dai(t-1)+ DELTA ai(t) where ai(t) is the integrator output at time t, D is the decay factor and DELTA ai(t) is the update increment.
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