| 摘要 |
PURPOSE:To improve step-coverage in second or upper multilayer interconnections, by forming through holes in the process of etching-back for forming a flat semiconductor surface. CONSTITUTION:An oxide layer 2 is formed on a Si semiconductor substrate 1, and then a first interconnection layer 3 having a prescribed pattern is formed thereon. A second insulating material layer 4 is piled moreover, then covered with a posi-resist 5. Portions in the layer 5, which face the layer 3, are then opened to form prescribed patterns, and the resist 5 is removed by anisotropic etching. In this process, openings 6 are formed in the layer 4 via the openings formed in the layer 5. Besides, a third insulating material layer 7 is piled on this surface of the layer 4, to obtain a flat surface. Then, covered with a posi- resist layer 8 again, openings 9 larger in diameter than the openings 6 are formed by anisotropic etching. Because cross sections of the openings 9 are shaped in steps, step-coverage in a second interconnection layer 10 formed thereafter can be improved.
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