| 摘要 |
PURPOSE:To prevent defective continuity from occurring, by supplying power voltage to gate electrodes of C-MOS semiconductor elements formed on a semiconductor substrate, through diffusion layers on which the power voltage is impressed. CONSTITUTION:An inverter circuit 49, which is provided with a C-MOS output circuit and to be in an off state, is obtained by connecting a Si gate electrode 101 with a one-layer interconnection 12 on a P-ch side via a first opening part 11 formed in a first insulating film. The other side of the interconnection 12 is connected with a N<+>-type region 62, by which the P-ch is surrounded and on which a power voltage is impressed, via a third opening part 13 formed in the first insulating film so that the off state is obtained. A Si gate electrode 201 is connected with a one-layer interconnection 15 on a N-ch side via a first opening part 14 formed in the first insulating film. The other side of the interconnection 15 is connected with a P<+>-type region 64, by which the N-ch is surrounded and on which GND is impressed, via a third opening part 16 formed in the first insulating film. Hence, Si merging into the one-layer interconnection by heat treatment can be minimized, and defective continuity due to Si precipitation can be prevented from occurring.
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