发明名称 RELOCK CIRCUIT OF SAMPLING QUARTZ LOCK CIRCUIT
摘要 PURPOSE:To make a channel reselection operation unnecessary, by leading an oscillation frequency into a capture range forcedly for switching of a function change-over switch, electric power resupply, and so on. CONSTITUTION:The output terminal of gate transistor TrQ3 is connected to one input terminal of voltage comparator OP1, which constitutes an LPF, through resistance R2 to lead the output from the FM detector, which is not shown in the figure, to the input side of voltage comparator OP2. Two-system control circuits 9 and 10 which are provided in the output side of comparator OP2 and generate outputs of levels opposite to each other for the output from the tuning center point are connected to the input terminal of TrQ3, and capacitor C4 which is charged for switching of switches such as function change-over switch 15 and power source switch S1' and flows a current to TrQ3 in the charging time is provided at the control terminal of TrQ3. As a result, the oscillation frequency can be led into the capture range forcedly for switching of switch 15 and power resupply to make the channel reselection operation unnecessary.
申请公布号 JPS562741(A) 申请公布日期 1981.01.13
申请号 JP19790079551 申请日期 1979.06.22
申请人 SANYO ELECTRIC CO 发明人 IMAMURA EIGO;MASUHARA MASAMI
分类号 H03J7/28;H03L7/10;H03L7/113;H03L7/20;H04B1/26 主分类号 H03J7/28
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