发明名称 MICROPROGRAM CONTROL SYSTEM
摘要 PURPOSE:To make it possible to detect abnormal program processing by providing a bit concerning a branch instruction among parallel processing bits of microprogram muPG decoding machine instruction words. CONSTITUTION:To an instruction word of muPG, bit OUTB standing for a branch instruction, bit INB standing for an instruction assigned to the jump destination address of another branch instruction, and bit IDB standing for an instruction assigned to an address right before the jump destination address are added for muPG processing. Each instruction word has a combination of three bits OUTB, INB and IDB. In terms of machine instruction words, the branch instruction is defined as SI, and the instruction assigned to the jump destination address determined by the branch instruction is defined as DI; and the instruction serving as SI and DI is also defined as SDI, and an instruction belonging to none of the above-mentioned three instructions as OI. Further, dynamic information is defined as bit JMPF of flag register 1. Those instructions and bits are combined as shown in the figure and combinations except the above-mentioned combinations are regarded as errors and instruction-by-instruction detection of abnormality comes into effect.
申请公布号 JPS562049(A) 申请公布日期 1981.01.10
申请号 JP19790076271 申请日期 1979.06.19
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 WATANABE TAKAO
分类号 G06F11/08;G06F9/22;G06F9/26;G06F11/30 主分类号 G06F11/08
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